44 pin female edge at the computer. The pins function as described
||System ground. All four ground lines are usually tied together.
||5-volt power supply to the cartridge. (Total user port and
cartridge devices can draw no more than 450 mA.)
||IRQ. As long as this is low, it requests an interrupt.
||Read/write line. Reads when low, writes when high.
||8.18 MHz video dot clock input, for your own video control.
||I/O 1 goes low when 64 detects use of $DE00-$DEFF; can be used
||GAME replaces BASIC ROM with external cartridge ROM when grounded.
||EXROM replaces RAM $8000-$9FFF with cartridge ROM when grounded.
||I/O 2 goes low when 64 detects use of $DF00-DFFF.
||ROML chip enable selects ROM $8000-$9FFF when EXROM is low; needs
address bits A0-A12.
||Bus available signal from the VIC-II chip. To use, pull DMA low.
An external device can control the 64 while BA is high.
||Direct memory access request line.
||D7 through D0. The data bus carries eight bits of data.
||ROMH selects external ROM at $A000-$BFFF (or $E000-$EFFF, for MAX)
when GAME or EXROM is low; needs address bits A0-A12.
||RESET detects a positive voltage, resetting when rising from
ground to +5 volts.
||NMI connects to 6510 Non-Maskable Interrupt line. It is spike
sensitive - needs a pulse in either direction. Normally high, so
many devices can signal NMI.
||Phase 2 system clock. Essential for I/O timing, but not necessary
for external ROM.
||Address bus (A15 - A0). The full 16 address lines are necessary