TOS 2.06 Installation Instructions for 1040ST (V2.0)
This document contains a procedure for installing TOS 2.06 EPROMs into a 
1040ST revision C motherboard.  A simple circuit consisting of 3 TTL ICs
wire and patience is all that is required.  The total cost of the upgrade
will be the cost of the TOS 2.06 EPROMs ($60) plus $1 for the TTL chips.
The OS upgrade should work on other STs as well but this upgrade has only
been implemented on a revision C motherboard of a 1040ST (~1986 vintage).
This upgrade requires some careful soldering so don't try it unless you
have had some PC board soldering experience (don't use a soldering gun!).
I would like to thank all who responded to my questions on notes for their
help.  Without the help, I would have had a slim chance of getting this
thing to work.  
I would like to suggest that anyone who wants TOS 2.06 to buy it from
Codehead Technologies: (213)-386-5735  They send along a nice manual
and a great utilities disk.
Most 520ST and all 1040ST computers were shipped with 6 ROMs that contained
TOS (The Operating System).  These ROMs are mapped into the address space
0xFC0000 to 0xFEFFFF.  This is a 192K byte space.  Each ROM holds 32K 
bytes.  TOS 2.06 is larger than 192K for extra features and bug fixes so
the address space had to be moved.  The address space 0xFF0000 to 0xFFFFFF
is used by I/O ports on the ST so the existing space could not just be
The new address space for TOS 2.06 is 0xE00000 to 0xE3FFFF.  I might add 
that previous versions of TOS may have been here also but I went from TOS 
1.0 to TOS 2.06 so I can't say for sure.  Also, instead of putting TOS 
2.06 into 8 32K byte ROMs it was placed into two 128K byte EPROMs.  One 
part is called EVEN (supplies the high 8-bits) the other part is called 
ODD (supplies the low 8-bits).
When the 68000 comes out of the reset state, it reads the first 8 bytes
in its address space (0,1,2,3,4,5,6,7).  From this data it gets an initial
value for the supervisor stack pointer and the initial value for the 
program counter.  What the 520ST and 1040ST do (via the GLUE chip) is to
remap addresses 0 through 7 to 0xFC0000 to 0xFC0007.  The ROMs are 
programmed to have the start address in these locations.  TOS 1.0 had the
value 0xFC0020 while TOS 2.06 has the address 0xE00030.
In 520ST and 1040ST computers, the address space 0xE00000 to 0xEFFFFF is
not used or decoded.  If a memory cycle is attempted in this range the
data bus will time out and an bus error will result.
The requirements to get TOS 2.06 to work in a 1040ST are as follows:
1. Decode the address range 0xE00000 to 0xE3FFFF and have the TOS 2.06 
   ROMs drive their data when addressed.	
2. Generate DTACK for accesses to TOS 2.06 space.  
3. Map the address range 0->7 to 0xE00000->0xE00007.
4. Mechanically connect the EPROMs and decoder logic to the motherboard.
The address range can be decoded with the high 4-bits of the address bus
(A23->A20) to decode the address range 0xE00000 to 0xEFFFFF.  This will
work fine because nothing else is in the range 0xE40000 to 0xEFFFFF.  
The DTACK signal in the ST is an open collector (wire OR) type bus.  This
means that any device that wants to assert DTACK may only do so with an
open collector type interface.  This interface basically is one in which
the driver can either drive the line to GROUND or not drive the line at all.
This is different than normal TTL which will drive outputs to GROUND or +5
(in reality 0.4 to 3.8V).  The DTACK line has a pull up resistor on it 
which will bring the line high if none of the devices on the bus are 
driving it low.  The DTACK signal can be derived from the decoder logic 
but must be buffered with an open collector buffer.
The GLUE chip decodes the 0->7 address range and the range 0xFC0000 to
0xFCFFFF and asserts the signal ROM2 when either of these two ranges are
addressed.  The interface can use this fact and OR in the ROM2 signal with
the 0xE????? space to enable TOS 2.06 ROMs.  This way the boot up sequence
will be as follows:
1. 68K will read addresses 0->7 which will cause the ROM2 signal from
   GLUE to be asserted.
2. Data will be read from locations 0xE00000 through 0xE00007.
3. The 68K will then jump to address 0xE00030 and begin executing code.
4. At this point the ROM2 signal will never be asserted again and the
   TOS 2.06 decoder logic will do the work.
The TOS 2.06 EPROMs are a super set of the TOS 1.0 parts.  This means that
nearly all of the pins of the new parts can be plugged into the sockets
of the old parts.  All of the signals needed for the decoder are available
off of the GLUE chip.  Therefore the 3 TTL chips will be placed near the
GLUE chip by glueing them to the motherboard with their pins bent up.  
Before you attempt this upgrade make sure that you have enough room between
the two ROM sockets to place the 32-pin parts into the sockets.  On the
Rev C mother board there is no problem.  The TOS 2.06 chips will have pins
1,2,31 and 32 hanging out over the end of the socket.  Basically if there
is more than a quarter inch between U4 and U7 you are set.
Step by Step Instructions:
Please read through the remaining instructions before starting to 
determine if this upgrade is something you want to attempt.  There are
two main steps.  The first step is the construction and testing of the
address space decoder and DTACK logic.  The second step is the insertion
of the new ROMs into the system.  Before you start you will need a
disk with a program on it to read address 0xE00000.  This program will
be used to determine if the decoder and DTACK generator are working.
Before the circuit is implemented the program will generate a bus error
and display bombs on the screen.  After the circuit is implemented the
program should just read the value 0xFFFF if you do a 16-bit read.
   	unsigned int *ptr=(unsigned int *)0xE00000;
 	printf("Value read was 0x%04x\n",*ptr);
Step 1 (Implement the Address decoder and DTACK Generator).
The schematic below (I hate ASCII schematics more than you do) shows
the address decoder and DTACK logic.  The circuit has 10 signals
that connect directly up to the GLUE chip and 3 signals that connect
directly to the TOS 2.06 ROMs.  The GLUE signals are on the left and
the TOS 2.06 EPROM signals are on the right.
(19,XX)  ROM2_>--------------------------+    +--------+-----+--------+
                                         |    | Chip   | +5V | Ground |
                      74F138             |    +--------+-----+--------+
                  +--------------+       |    | 74F138 | 16  |   8    |
(11,52)    A23>---|a0(1)   q0(15)|o-     |    | 74F08  | 14  |   7    |
(10,51)    A22>---|a1(2)   q1(14)|o-     |    | 74F244 | 20  |   10   |
(09,50)    A21>---|a2(3)   q2(13)|o-     |    +--------+-----+--------+
                  |        q3(12)|o-     |  _______
(12,06)    AS_>--o|e1(4)   q4(11)|o-     |  \      \  74F08
(08,48)    A20>--o|e2(5)   q5(10)|o-     +--o\a(1)  \ 
(55,09)   R/W_>---|e3(6)    q6(9)|o-          )  y(3))o--------> CE_
                  |         q7(7)|o---*-----o/b(2)  /
                  +--------------+    |     /______/
                        74F244        |
                   +-------------+    |
                   |        oe(1)|o---+
(31,10)  DTACK_<---|y0(18)  i0(2)|--+   
                   |             |  |
                   +-------------+  |
                        |  ____
                        +--|4  \  74F08
                           |  6 )-------------------------->BA17
(05,45)    A17>------------|5__/
                        |  ____
                        +--|9  \  74F08
                           |  8 )-------------------------->BA16
(04,44)    A16>------------|10_/
Numbers in parenthesis on the left are (GLUE pin #,68000 pin #).  The
ROM2 signal is not connected to the 68K but can also be found on pin
20 of U4 and U7 (TOS 1.0 EPROMs).  Parts needed are one of each of the 
following, 74F138,74F08 and 74F244.  Different families (LS, ALS, AS) 
may be substituted for the above parts.  
The following is a description of how the circuit was constructed.
The main deal is that the current TOS ROMs must be left in the ST.
Don't take them out until this circuit has been verified.
Start out by removing the motherboard from the case and RF shield.
Carefully remove the disk drive and power supply. Save the piece of
black plastic for insulation to lay the PC board on while working on
it and also when debugging.
Locate the area of the board shown below near the GLUE and MMU chips.
The three TTL chips will need to be glued in the areas shown in the
diagram below.
                     74F138  74F08   74F244          +-------------+
            Hole     +---+   +---+   +---+           |             |
            +--+     |   |   |   |   |   |           |             |
            |  |     |   |   |   |   |   |           |    GLUE     |
            |  |     |   |   |   |   |   |           |             |
            |  |     |   |   |   |   |   |           |             |
            +--+     +---+   +---+   |   |           |             |
                                     +---+           +-------------+
                      U60     U61    GROUND          +-------------+
                     +---+   +---+ _|_               |             |
                     |   |   |   | | |               |             |
                     |   |   |   | | | C88           |    MMU      |
                     |   |   |   | |_|               |             |
                     |   |   |   |  |                |             |
                     +---+   +---+   +5V             |             |
                     DRAM    DRAM                    +-------------+
To make life a bit easier bend all the pins of the three chips up
to change them from the pins going down to the pins going up.  This
way pin 1 will be the top left one.  I used a rubber cement type glue
to glue the chips to the PC board.  Try to find spots without the
silver pop throughs so that the parts are rock solid.  Super glue
should also work.  Also, put the chips close to the hole since this
is where the wires to connect to the GLUE chip will go.  Keep in mind
that a plastic shaft about half as wide as the hole will still need
to go through it.  You can always cut it off as a last resort.
Let the glue dry before soldering to the chips.  After the glue dries,
make sure that your computer still works.  This can be done by 
placing the mother board on the black plastic and connecting up the
power supply and disk drive.  Just place a the disk in the drive with
the small program to read 0xE00000.  Connect up the monitor and blow 
off the keyboard for now.  Switch on the power (be careful when you 
plug in the power cord not to get zapped).  You machine should come up. 
If you are careful you can plug in the keyboard while the power is off
but there is really no place to physically support it.
Now that you are convinced that you machine still works it is time
to do some wiring.  Use wire wrap wire for all of the connections.  I
believe that you can still get it at radio shack.  First, connect up 
power to the TTL parts.  As shown in the previous diagram +5 and GROUND 
can be obtained off of the capacitor C88.  Next, connect up the logic 
in the circuit diagram.  An Ohm meter should be used to verify your 
The final step of the decoder circuit construction is to connect up the 
10 wires to the GLUE chip.  Remember that all but one of the 10 
connections to the GLUE chip has an electrical connection to the 68000.
The connections to GLUE will be made on the bottom of the board.  Don't 
solder directly to the GLUE chip.  Run the wires from the GLUE chip on 
the bottom of the board through the hole marked in the above diagram 
and then to the 3 TTL chips.  Keep the wires as short as possible and 
keep them next to the PC board.  The following two diagrams show the 
pin outs of the GLUE and the 68000 respectively.  Check connections 
with an Ohm meter on the top of the board from the 68K to the 3 TTL 
chips.  The ROM2 signal can be checked from pin 20 of the TOS ROM U4.  
Also, note that pin 1 of the glue chip has a square pad instead of a 
round one.  There is a dot on top of the chip.
                                    Bottom View                  
                             61 63 65 67  1  3  5  7  9
                              o  o  o  o  [] o  o  o  o
                               62 64 66 68  2  4  6  8
                        60 o    o  o  o  o  o  o  o  o    o 10
                           59 o                        o 11
                        58 o                              o 12
                           57 o                        o 13
                        56 o                              o 14
                           55 o                        o 15
                        54 o                              o 16
                           53 o                        o 17
                        52 o             GLUE             o 18
                           51 o                        o 19
                        50 o                              o 20
                           49 o                        o 21
                        48 o                              o 22
                           47 o                        o 23
                        46 o                              o 24
                           45 o                        o 25
                        44 o    o  o  o  o  o  o  o  o    o 26
                               42 40 38 36 34 32 30 29
                              o  o  o  o  o  o  o  o  o
                             43 41 39 37 35 33 31 29 27
	                          MC68000 (Top View)
	                     D4 -|1           64|- D5 
	                     D3 -|2           63|- D6
	                     D2 -|3           62|- D7
	                     D1 -|4           61|- D8
	                     D0 -|5           60|- D9
	         ----->     AS_ -|6           59|- D10
	                   UDS_ -|7           58|- D11
	                   LDS_ -|8           57|- D12
	         ----->    R/W_ -|9           56|- D13
	         ----->  DTACK_ -|10          55|- D14
	                    BG_ -|11          54|- D15
	                 BGACK_ -|12          53|- GND
	                    BR_ -|13          52|- A23   <---
	                    Vcc -|14          51|- A22   <---
	                    CLK -|15          50|- A21   <---
	                    GND -|16          49|- Vcc
	                  HALT_ -|17          48|- A20   <---
	                 RESET_ -|18          47|- A19
	                   VMA_ -|19          46|- A18
	                      E -|20          45|- A17   <---
	                   VPA_ -|21          44|- A16   <---
	                  BERR_ -|22          43|- A15
	                  IPL2_ -|23          42|- A14
	                  IPL1_ -|24          41|- A13
	                  IPL0_ -|25          40|- A12
	                    FC2 -|26          39|- A11
	                    FC1 -|27          38|- A10
	                    FC0 -|28          37|- A9
	                     A1 -|29          36|- A8
	                     A2 -|30          35|- A7
	                     A3 -|31          34|- A6
	                     A4 -|32          33|- A5 
Now that the connections have been made double check your work and
make sure that no pins of GLUE or the decoder are shorted.  After
you are sure connect up the power supply, disk drive, keyboard/mouse
and monitor and power up you ST.  If your machine does not come up
turn off the power and check your work again.  If all fails remove
a wire or two until your machine boots.  The DTACK_ line is the first
one to remove when in doubt.  If your machine did come up you are
in pretty good shape.  Try running the program described before that
will do a read cycle to 0xE00000.  If this program prints any result
without a bomb on the screen you are just about done with the upgrade.
Turn off the power and get ready for the final step.
Step 2 (Yank out the old ROMs and bring in the new)
Now comes the part that you have been waiting for.  The diagram below
shows the location and diagram of the original TOS in the ST.  Note
that U4 is connected to bits D15 through D8 and U7 is connected to
bits D7 through D0.  Believe it or not the ROM2 signal really does
select the low address ROM set.  Basically what is going to be done
in this step is to remove all six of the TOS ROMs and insert the 
EVEN TOS 2.06 ROM into the socket for U4 with the chip enable pin 
lifted.  Likewise, the ODD TOS 2.06 ROM will go into the socket for U7.
                |            |            |
         U2     |     U3     |     U4     |
      +------+  |  +------+  |  +------+  |
      |      |  |  |      |  |  |      |  |
      |      |  |  |      |  |  |      |  |
      |oe(22)|o-+  |oe(22)|o-+  |oe(22)|o-+
      |      |     |      |     |      |                 Even Bank
      |ce(20)|o-+  |ce(20)|o-+  |ce(20)|o----+
      |      |  |  |      |  |  |      |     |
      | 0150 |  |  | 0151 |  |  | 0152 |     |
      +------+  |  +------+  |  +------+     |
                |            |               |
                             |               |     |
 ROM1_>----------------------*------------------+  |
                                             |  |  |
 ROM2_>--------------------------------------*  |  |
                                             |  |  |
 LDS_>----------*------------*------------+  |  |  |
                |            |            |  |  |  |
         U5     |     U6     |     U7     |  |  |  |
      +------+  |  +------+  |  +------+  |  |  |  |
      |      |  |  |      |  |  |      |  |  |  |  |
      |      |  |  |      |  |  |      |  |  |  |  |
      |oe(22)|o-+  |oe(22)|o-+  |oe(22)|o-+  |  |  |
      |      |     |      |     |      |     |  |  |    Odd Bank
      |ce(20)|o-+  |ce(20)|o-+  |ce(20)|o----+  |  |
      |      |  |  |      |  |  |      |        |  |
      | 0153 |  |  | 0154 |  |  | 0155 |        |  |
      +------+  |  +------+  |  +------+        |  |
                |            |                  |  |
                |            +------------------+  |
                |                                  |
The 4 digit code at the bottom of each ROM is the last 4 digits of
the part number.  For example the complete part number of U7 is
RP23256 0155.  The ROMs are of the type 27256.
Carefully pull each of the six ROMs out using a flat tipped screw
driver.  Save the ROMs in case you need to go back to TOS 1.0.  Make
note of the position and part number of each chip.
Bend pins 1,2,3,22,31 and 32 of both TOS 2.06 EPROMs up 90 degrees
so that the pins lie in the same plane as the ceramic package:
                       Side view:
    pins 1,2 & 3 --> __========__  <-- pins 22,31 & 32
    pins 4,5,6,7 -->   |      |    <-- pins 17,18,19,20,21,23
         8,9,10,11,12                      ,24,25,26,27,28,29 & 30
         13,14,15 & 16
                       Top view:
                  ---==|1     32|==---
                  ---==|2     31|==---   
                  ---==|3     30|=
                      =|4     29|=   
                      =|5     28|=   
                      =|6     27|=   
                      =|7     26|=   
                      =|8     25|=   
                      =|9     24|=   
                      =|10    23|=   
                      =|11    22|==---   
                      =|12    21|=   
                      =|13    20|=   
                      =|14    19|=   
                      =|15    18|=   
                      =|16    17|=   
Place the EVEN TOS 2.06 EPROM into the socket for U4 so that pin
16 goes into the hole for pin 14 of the original TOS ROM.  See the
diagram below of the old (27256) vs. new (27C1001) chips.
  		   27256                        27C1001
                                          Vpp-|1     32|-Vcc
                 +--------+               A16-|2     31|-PGM_
             Vpp-|1     28|-Vcc           A15-|3     30|-NC
             A12-|2     27|-A14           A12-|4     29|-A14
              A7-|3     26|-A13            A7-|5     28|-A13
              A6-|4     25|-A8             A6-|6     27|-A8
              A5-|5     24|-A9             A5-|7     26|-A9
              A4-|6     23|-A11            A4-|8     25|-A11
              A3-|7     22|-OE_            A3-|9     24|-OE_
              A2-|8     21|-A10            A2-|10    23|-A10
              A1-|9     20|-CE_            A1-|11    22|-CE_
              A0-|10    19|-D7             A0-|12    21|-D7
              D0-|11    18|-D6             D0-|13    20|-D6
              D1-|12    17|-D5             D1-|14    19|-D5
              D2-|13    16|-D4             D2-|15    18|-D4
             GND-|14    15|-D3            GND-|16    17|-D3
                 +--------+                   +--------+
The parts should not touch each other and the lifted pins should not
be above the tops of the chips.  Put the power supply back over the
EPROMs (Rev C) board and make sure that the bottom plate does not
touch the parts.  It will look close but if you can see day light
you are ok.
Connect lifted even EPROM pins 1,31 & 32 to even EPROM pin 30 (+5V).
Be careful not to drip solder down into the socket so that the part
can be removed if desired.
Connect lifted odd EPROM pins 1,31 & 32 to odd EPROM pin 30 (+5V).
The remaining three connections are made from the EPROMs to the 
TTL decoder.  Make the wires as short as possible and keep them next
to the PC board.  Thread the wires through the bypass caps to help
keep the wires under control.
Connect even EPROM lifted pin 22 to odd EPROM lifted pin 22 then
connect to pin 3 of the 74F08 (CE_).  This is the new equivalent ROM2
Connect even EPROM lifted pin 3 to odd EPROM lifted pin 3 then
connect to pin 8 of the 74F08 (BA16).  This is a buffered version of
address line A16.
Connect even EPROM lifted pin 2 to odd EPROM lifted pin 2 then
connect to pin 6 of the 74F08 (BA17).  This is a buffered version of
address line A17.
Check your work with an Ohm meter and your eyes.  Connect up the
power supply and all the other junk and give it a try.  If everything
is happy you will see Atari's Logo on your screen when you turn on the
power.  The machine will sit for a bit and then start doing a RAM test
After the RAM test, the machine will place a bar on the screen and
shrink it until it is gone then your machine will fire up the desktop.
You can bypass the memory test or the bar at any time by hitting the
space key.  If your machine works, great job.  Put it back together
and enjoy.
    If you have complaints, questions or whatever, drop me some email:
    			Enjoy TOS 2.06
				Ted Rossin.
Revision History:
Rev 2.0:
Thanks to great feedback from Arthur K Whitney the following changes 
have been made.
a. The GLUE DTACK_ pin number has been changed from 50 to 31.  Lets
   just say that I blew it when I drew the original schematic in my
b. The circuit is drawn using a 74F244 instead of the 74F06 and
   the pull up resistor.  The 74F06 part is a bit hard to find.
Rev 1.0:
    Initial Revison.


(C) Marko, Suomen Atari-sivut / ArkiSTo 2003